GSPN models of ATM networks

February 10-11, 2003

For any kind of question and clarification please, email at rossano@di.unito.it

The deadline to email the answers is to be decided.



The exercises are aimed at experimenting with the specification and analysis of GSPN models of ATM network components.
  1. EXERCISE N.1

    Create the GSPN model of the Knockout ATM switch architecture using the following parameters:

    • Number of input ports (N) = 4
    • Speed up (SU) = 2
    • Internal buffer size (IB) = 1
    • Output buffer size (M) = 50

    Priority of immediate transitions must be set as follows:

    TRANSITION NAME

    PRIORITY VALUE

    cell, no_cell

    1

    internal_loss

    2

    next, flush

    3

    switch, all_empty

    4

    output_loss, accept

    5

    transmit

    6

    The rate of timed transition clock is = 1.0 with 1-server semantic.

    1. Solve the model in steady-state for the following scenarios (a1, a2, a3 and a4 are the probabilities of incoming cells at the different input lines):
      • a1=a2=a3=a4=0.125;
      • a1=a2=a3=a4=0.15;
      • a1=a2=a3=a4=0.2;
      • a1=a2=a3=a4=0.24;

      For each scenario, compute the following performance indexes provided that the total load offered to the output buffer is R=a1+a2+a3+a4:

      • Output Cell Loss Ratio
        OCLR = SU * X(output_loss) / R
      • Internal Cell Loss Ratio
        ICLR = SU * ( X(internal_loss1)+X(internal_loss2)+X(internal_loss3)+X(internal_loss4)) / R
      • Average Buffer Availability
        ABA = TOK(OUTPUT_BUFFER_SPACE), i.e., the mean number of tokens in place OUTPUT_BUFFER_SPACE

    2. Repeat all the previous analysis with output buffer size = 30

  2. EXERCISE N.2

    Repeat EXERCISE N.1 for the Gauss ATM switch architecture using the same parameters. In this case, priority of immediate transitions must be set to the following values:

    TRANSITION NAME

    PRIORITY VALUE

    cell, no_cell

    1

    internal_loss

    2

    next, flush

    3

    load

    4

    shift_full, shift_empty

    5

    output_loss, accept

    6

    transmit

    7

  3. EXERCISE N.3

    Analyse the possible unfairness of the Gauss ATM switch architecture, i.e., compute the ICLR values, by considering several load scenarios where the probabilities of incoming cells at each input line (a1, a2, a3, a4) are not equal, as in EXERCISE N.1 and N.2. In particular, consider the following scenarios:

    • a1=0.9, a2=a3=a4=0.03;
    • a1=0.03, a2=0.9, a3=a4=0.03;
    • a1=a2=0.03, a3=0.9, a4=0.03;
    • a1=a2=a3=0.03, a4=0.9;

    • a1=0.4, a2=0.3, a3=0.09, a4=0.2;
    • a1=0.4, a2=0.2, a3=0.09, a4=0.3;
    • a1=0.3, a2=0.2, a3=0.09, a4=0.4;
    • a1=0.3, a2=0.1, a3=0.09, a4=0.5;

    For each scenario, compute and discuss the ICLR values. For this analysis, the output buffer can be neglected, therefore set M=0

  4. EXERCISE N.4

    Analyse and compare the peformance of the Knockout and Gauss ATM switch architectures when the internal speed up (SU) is set = 3 (instead of 2 as in the previous exercises). Consider the load scenarios of EXERCISES N.1 and N.2 and choose one among those in EXERCISE N.3; consider increasing values of the output buffer size (M). In particular, plot a graph for each scenario where the x-axis represents the output buffer size values and the y-axis represents the OCLR values. Consider M ranging from 10 to 100.

  5. EXERCISE N.5

    Repeat EXERCISE N.3 assuming that the internal buffer size (IB) is equal to 2 (instead of 1 as in EXERCISE N.3).


Answers should be emailed to rossano@di.unito.it by a yet unknown date to be graded.